{"id":31545,"date":"2024-07-18T11:35:46","date_gmt":"2024-07-18T09:35:46","guid":{"rendered":"https:\/\/www.tpole.it\/news-by-t-pole\/tpole-presenta-il-modello-spc-9000-di-vecow\/"},"modified":"2025-04-18T12:10:29","modified_gmt":"2025-04-18T10:10:29","slug":"tpole-presents-the-spc-9000-model-from-vecow","status":"publish","type":"post","link":"https:\/\/www.tpole.it\/en\/news-by-t-pole\/tpole-presents-the-spc-9000-model-from-vecow\/","title":{"rendered":"TPole presents the SPC-9000 model from Vecow"},"content":{"rendered":"\n

TPole presents Vecow’s SPC-9000 model, the first PC with the Intel\u00ae Meteor Lake<\/a>, chiplet architecture, particularly suitable for artificial intelligence applications.<\/p>\n\n\n\n

\"Meteor<\/a><\/figure>\n\n\n\n
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Main features<\/h2>\n\n\n\n
\"Caratteristiche-principali-SPC-9000-di-Vecow\"<\/a><\/figure>\n<\/div>\n\n\n\n
\n

<\/p>\n<\/div>\n<\/div>\n\n\n\n

Connectivity is already ready to be interfaced with new technologies.<\/p>\n\n\n\n

\n
\n
\"Connettivita-pronta\"<\/a><\/figure>\n<\/div>\n\n\n\n
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\"\"<\/a><\/figure>\n<\/div>\n<\/div>\n\n\n\n

Particular attention is also paid to the boxes which satisfy the most demanding requests in terms of protection and reliability.<\/p>\n\n\n\n

\n
\n
\"\"<\/a><\/figure>\n<\/div>\n\n\n\n
<\/div>\n<\/div>\n\n\n\n
\n\n\n\n<\/span>\n\n\n\n

New Intel\u00ae Meteor Lake architecture<\/h2>\n\n\n\n

Let’s discover together the new Intel\u00ae Meteor Lake architecture, the first Intel chiplet architecture.<\/strong><\/p>\n\n\n\n

Chiplet technology refers to a processor composed of multiple independent “tiles” (TILE) integrated into a single package.<\/p>\n\n\n\n

Meteor Lake processors are in fact made up of four tiles integrated with an advanced power management system that allows the units to be activated only when needed. In fact, it is as if Meteor Lake integrated four processors into one:<\/p>\n\n\n\n

\n
\n
\"Tile-Architecture\"<\/a><\/figure>\n<\/div>\n\n\n\n
<\/div>\n<\/div>\n\n\n\n

Below we highlight the individual tiles with their main features.<\/p>\n\n\n\n

GPU<\/h2>\n\n\n\n
\n
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It offers double the performance compared to the previous generation (Xe-LP) and has hardware for managing ray tracing.<\/p>\n\n\n\n

This component is responsible for graphics rendering, managing all operations related to screens and views.<\/p>\n\n\n\n

It can also be configured to support various levels of performance, allowing for a balance between power and energy consumption.<\/p>\n<\/div>\n\n\n\n

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\"\"<\/a><\/figure>\n<\/div>\n<\/div>\n\n\n\n
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SoC<\/h2>\n\n\n\n
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It integrates two LPE-Core, or Low Power E-Core, which allow you to manage some light loads without having to activate the Compute Tile or the Graphics Tile, so as to have an improvement in energy efficiency, the NPU for artificial intelligence, the memory controller and DDR, the Wi-Fi 6E \/ Wi-Fi 7 and Bluetooth modules, the Display Engine with native HDMI 2.1, DisplayPort 2.1 and Media Block support, moved for the first time from the graphics tile to the SoC to reduce consumption and improve autonomy and efficiency when playing videos or streaming.<\/p>\n\n\n\n

An innovative feature is the introduction of a new type of E-core integrated directly into the SoC tile, called \u201clow power island\u201d. These LP E-cores are designed to handle light workloads and less demanding processes, moving them to a more power-efficient tile.<\/p>\n\n\n\n

Supports DDR5 and LPDDR5, improving memory bandwidth and speed.<\/p>\n<\/div>\n\n\n\n

\n
\"\"<\/a><\/figure>\n<\/div>\n<\/div>\n\n\n\n
\n\n\n\n

IO<\/h2>\n\n\n\n
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\n

Manages all input\/output connections of the SoC. This includes the interface with the outside, such as USB, Thunderbolt, HDMI and other ports. It has been optimized to offer greater flexibility and speed in external communications, facilitating the use of additional devices and improving the user experience.<\/p>\n<\/div>\n\n\n\n

\n
\"\"<\/a><\/figure>\n<\/div>\n<\/div>\n\n\n\n
\n\n\n\n

COMPUTE<\/h2>\n\n\n\n
\n
\n

It is designed to handle high-performance tasks, including intensive calculations and processing needs. This component is crucial to ensuring that the processor can handle heavy applications and high-performance computing tasks without problems. The Compute Tile has been optimized to offer a balance between performance and power consumption, making it ideal for a wide range of applications.<\/p>\n\n\n\n

Inside, Intel\u00ae has introduced a new pair of cores: a P-core (Performance) and an E-core (Efficiency). The P-core is designed to handle high-performance tasks, while the E-core is optimized to handle less intensive but necessary tasks, such as running background processes and managing system services.<\/p>\n<\/div>\n\n\n\n

\n
\"\"<\/a><\/figure>\n<\/div>\n<\/div>\n\n\n\n
\n\n\n\n

Would you like more information?<\/h2>\n\n\n\n

Our sales representatives are available to provide all the necessary information. Contact us.<\/a><\/p>\n","protected":false},"excerpt":{"rendered":"

TPole presents Vecow’s SPC-9000 model, the first PC with the Intel\u00ae Meteor Lake, chiplet architecture, particularly suitable for artificial intelligence…<\/p>\n","protected":false},"author":9,"featured_media":31541,"comment_status":"open","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[568,571,15],"tags":[],"news-tag":[584,583],"class_list":["post-31545","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-embedded-pc-en","category-hardware-news","category-news-by-t-pole","news-tag-spc-9000-en","news-tag-vecow-en"],"acf":[],"yoast_head":"\nTPole presents the SPC-9000 model from Vecow - TPole s.r.l.<\/title>\n<meta name=\"description\" content=\"Let's discover together the new Intel Meteor Lake architecture, the first Intel chiplet architecture. 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